I've been watching RISC-V for the last year, and for me it represents a coming tipping point that I've seen in other tech areas in the past. Having an open standard that people are rallying around is a game changer. I don't know how it effects ASICs specifically, but it seems to be helping open up FPGA development and tooling, making it easier for people outside big established companies to work. I see chip design getting easier (or at least more approachable) in the next 5 years, and I think it will only accelerate from there.
Mind you, I may have rose colored glasses on. I've been dreaming of JITs all the way down to the hardware layer ever since I first heard of an FPGA that could flash itself in a single clock cycle over a decade ago...
Mind you, I may have rose colored glasses on. I've been dreaming of JITs all the way down to the hardware layer ever since I first heard of an FPGA that could flash itself in a single clock cycle over a decade ago...